ECE1390 RF L3 - PLL Basics

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  - ✏️Note
related:
  - "[[ECE1390 RF - Wireless RF IC Design]]"

ECE1390 RF L3 - PLL Basics.pdf

Phase Locked Loop

frequency multiplier
reduce of VCO integral Phase Noise
modulate VCO Phase in TX
PLLs have equal input and output Frequencies or
Type I PLL:
Type II PLL:

Linear Phase Model

ECE1390 RF L3 - PLL Basics-1759824384977.png

PD is like an Operational Amplifier with gain
VCO is an integrator with gain

ECE1390 RF L3 - PLL Basics-1759824751067.png

Phase Detector

circuit that senses the Phase difference between two Periodic Signals

ECE1390 RF L3 - PLL Basics-1759821443236.png

gain of PD () is proportional to Phase, measured in V/rad
VCO Frequency increases or decreases to align Phase

XOR
ECE1390 RF L3 - PLL Basics-1759821879178.png

displays Periodic, non-monotonic characteristic

Type I PLL

ECE1390 RF L3 - PLL Basics-1760334240830.png

large is needed for stability, but leads to decrease in PD ripple
limited acquisition range
finite static phase error

Phase Frequency Detector

circuit that senses the Phase Difference and Frequency between two Periodic Signals
A produces rising edge on and resets it, avg of is PF info

ECE1390 RF L3 - PLL Basics-1760334037266.png

Charge Pump

eliminates tradeoff between damping factor and corner frequency of LF

ECE1390 RF L3 - PLL Basics-1760334419897.png

Higher Order Loops

adding filters can improve ripple but reduce phase margin

ECE1390 RF L3 - PLL Basics-1760334637692.png

Noise

PLL reduces phase noise at output
noise sources inside PLL are VCO, phase detector, loop filter + cp, and reference

ECE1390 RF L3 - PLL Basics-1760334804568.png