Hold Time ()

Minimum time after the active clock edge that input must remain stable.

Properties

  • A Flip-Flop requires to correctly sample the previous clock cycle input.
  • slack is

where,

  • : delay from preceding flip-flop
  • : delay from Combinatorial Logic after preceding flip-flop
  • : hold time for receiving flip-flop
  • : clock difference between preceding and receiving flip-flop

Analysis

A Flip-Flop uses Transmission Gates to transfer the contents stored from the input Latch to the output latch. The delay of the transmission gate is called . If the data transitions during , the flip-flop becomes Metastable and the output is unpredictable.

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